QuEra Unveils Gigaquop-Class Fault-Tolerant Roadmap and Invites Organizations to Co-Design Quantum Applications

QuEra Unveils Gigaquop-Class Fault-Tolerant Roadmap and Invites Organizations to Co-Design Quantum Applications

PR Newswire

Following its roadmap webinar, QuEra detailed a next-generation system designed for more than one billion reliable logical operations and is inviting organizations to co-design fault-tolerant applications through the FTQC Founders Circle.

BOSTON, June 25, 2026 /PRNewswire/ — QuEra Computing today detailed the next phase of its fault-tolerant roadmap, including plans for a next-generation gigaquop-class quantum computer coming in 2028 to 2029, and launched a call for solutions inviting enterprises, HPC centers, and government programs to co-design applications for fault-tolerant quantum hardware before it comes online.

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The announcement follows the June 15th unveiling of Libra, QuEra’s first fault-tolerant quantum computer, which is expected to arrive on Amazon Braket in 2028 as part of the company’s expanded strategic collaboration with AWS. Libra is a megaquop-class system, designed to perform on the order of one million reliable logical operations. QuEra’s multi-year strategic partnership with AWS is structured to span multiple system generations.

A Gigaquop-Class System

QuEra’s next-generation system is designed to perform on the order of one billion reliable logical operations, a level commonly referred to as gigaquop-class, and roughly a thousandfold increase over Libra. With projected specifications of more than 1,000 logical qubits, a 10⁻⁹ logical error rate, and over 20,000 physical qubits in a single processing core, the system is targeted for initial use at QuEra in the 2028 to 2029 timeframe. At this scale, gigaquop performance is expected to make substantially larger fault-tolerant workloads possible, including candidate applications in simulation, material and chemical design, machine learning, and optimization that are beyond practical classical computation.

The system extends a roadmap that spans Aquila, QuEra’s 256-qubit analog quantum computer available on Amazon Braket since 2022, and Gemini, a neutral-atom system with logical-qubit capabilities co-located with the ABCI-Q supercomputer in Japan.

“Libra brings fault tolerance to the cloud in 2028, and the next generation is about scaling it by orders of magnitude to unlock new breakthrough solutions to pressing industry problems. We have shown in published research that the building blocks for this scaling exist. This is how QuEra extends its leadership in quantum computing into the fault-tolerant era,” said Andy Ory, CEO of QuEra Computing.

Scaling Beyond Libra

Reaching gigaquop performance while keeping the architecture efficient and compatible with useful applications depends on progress in three areas: reducing space overhead, reducing time overhead, and accelerating quantum error-correction decoding. Together, these advances determine how many physical qubits are needed per logical qubit, how quickly useful logical operations can be executed, and whether the required classical processing can keep pace with the quantum processor.

QuEra’s neutral-atom platform is designed to move beyond a one-code-fits-all model. Flexible long-range connectivity, parallel atom control, and heterogeneous operating zones make it possible to explore and combine multiple QEC code families for different architectural roles, including memory, operations, and magic-state generation.

On space overhead, recent work from QuEra and collaborators points to ultra-high-rate qLDPC code families with an encoding rate close to 50% — effectively two physical qubits per logical qubit — with memory error rates projected in the 10⁻¹³ regime. Such codes could dramatically reduce the physical-qubit requirements for gigaquop-class machines and help open a path toward the teraquop regime.

On time overhead, QuEra is designing QEC architectures that are not only compact but also fast to run — pairing high-throughput syndrome extraction, low-depth logical operations, and efficient magic-state generation, all co-designed around neutral-atom hardware. This already pays off at the megaquop scale in BB-STAR, a megaquop architecture from QuEra and collaborators that co-designs quantum simulation on a lattice, QEC codes, and neutral-atom hardware together. For prototypical simulations such as transverse-field Ising and Fermi-Hubbard dynamics, BB-STAR cuts space-time costs by orders of magnitude — a concrete, Libra-scale case study where co-design makes useful computations far more practical.

For gigaquop-scale systems, QuEra is extending the co-design principle to the dominant operations in fault-tolerant computation. Syndrome extraction, the most frequent error-correction operation, must be high-throughput and low-depth. In QuEra’s recent work on ultra-high-rate qLDPC codes, this means searching not only for high encoding-rate codes, but also for efficient syndrome measurements with parallel hardware controls. The same principle applies to magic-state generation, often the most expensive fault-tolerant operation. A recent example of tricycle codes developed by Harvard researchers shows that high-rate magic can be generated by low-depth, efficient circuits. These examples show why flexibility is central to QuEra’s approach: flexible connectivity, parallelism, and distinct operating zones allow us to combine the codes, and reconfigure around better ones as they are discovered, all within a single device. 

Finally, scaling beyond Libra also requires accelerated QEC decoding. As systems grow, error correction must process a rising stream of syndrome data and produce corrections without allowing classical latency to bottleneck the quantum computation. QuEra is collaborating with NVIDIA to pair QuEra’s quantum processors with the NVIDIA platform for quantum-GPU supercomputing, including for real-time error correction at scale. Recent work from Harvard collaborators on neural-network decoders also points to a path in which fast inference can support real-time quantum execution for advanced codes.

“Building logical qubits at scale requires supercomputers integrating high-performance quantum processors with state-of-the-art accelerated computing for tasks such as quantum error correction and qubit calibration,” said Timothy Costa, Vice President and General Manager for Quantum at NVIDIA. “QuEra’s roadmap and the QuEra and NVIDIA collaboration demonstrate how leadership in fault-tolerant quantum systems, AI, and accelerated computing can come together to enable useful hybrid quantum-classical applications at scale.”

QuEra’s accelerated roadmap is built on major scientific advances made possible by support from the Defense Advanced Research Projects Agency (DARPA), through its ONISQ, MeasQuIT, and Small Business Innovation Research (SBIR) programs; the Intelligence Advanced Research Projects Activity (IARPA), through its ELQ program; the Department of Energy’s Quantum Systems Accelerator, part of the National Quantum Initiative; and the National Science Foundation. QuEra and its partners gratefully acknowledge this essential support and look forward to continued collaboration as we enter the era of practical, fault-tolerant quantum computing.

A Call for Solutions

Alongside the roadmap, QuEra opened a call for solutions through its FTQC Founders Circle, a program for organizations serious about a multi-year fault-tolerant collaboration. The company is inviting enterprises, HPC centers, and government programs to bring their highest-value problems as candidate applications. Selected participants will work with QuEra’s scientific and applications teams to evaluate candidate use cases, co-design fault-tolerant algorithms, and establish a path toward priority system access where technical and business fit are clear.

The rationale is timing. With early co-design across applications, algorithms, QEC codes, compilation, and hardware implementation, the number of physical qubits, runtime, and decoding overhead required for fault-tolerant algorithms can be reduced significantly. Mapping a hard problem onto fault-tolerant hardware is therefore a multi-year optimization process that should begin before gigaquop-class systems come online.

“A roadmap is only useful when customers can act on it,” said Yuval Boger, Chief Commercial Officer at QuEra. “With this call for solutions, we are inviting organizations to bring their highest-value problems into a co-design process for fault-tolerant systems. The organizations that begin now will define the first wave of useful quantum applications, rather than waiting to see what others build.”

Learn More

QuEra presented its full roadmap, including Libra and subsequent systems, during its June 24 webinar. A replay is available at www.quera.com/26roadmap.

  • Respond to the call for solutions. Organizations can apply to the FTQC Founders Circle at www.quera.com/get-started.
  • Schedule a private briefing. A limited number of confidential sessions with QuEra leadership are available at www.quera.com/ftqc-briefing.
  • Meet the QuEra team at Quantum.Tech World in Boston, June 25 to 26, Booth F12.

About QuEra Computing

QuEra is putting quantum to work. As the scientific and commercial leader in neutral-atom quantum computing, we help enterprise innovators leverage quantum to gain competitive advantage, support HPC centers as their users tackle classically intractable problems, and enable government programs to build national and sovereign capabilities. We do this by combining our quantum systems, available on-premises and via the cloud, with application co-design and collaborative research. Born at Harvard and MIT and still advancing together, QuEra builds neutral-atom systems on a public, peer-reviewed path to fault tolerance, and operates globally from Boston, New Mexico, Tokyo, Zurich, and the United Kingdom. As quantum computing moves from “one day” to “Day One,” QuEra delivers practical impact today while leading the path toward large-scale, fault-tolerant systems. See what’s possible at www.quera.com.

Media Contact: press@quera.com

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SOURCE QuEra Computing